BC TECH
Saved by @Mollyycolllinss

#RaspberryPiPico silicon teardown time!

 Board as received optical + x-ray images
Inspecting package. X-ray shows bond wires easier after removing thermal slug
Thermal slug removed w/ HCl + H2O2
Decapped to show copper bond wires connecting die to package pins. Initially used only nitric acid which destroyed copper bond wires (last image). Fixed by switching to mixed nitric + sulfuric acid
Zoomable top metal die image: https://t.co/MXqDBvNgqG
@Raspberry_Pi marking it's turf
B0 => chip revision. On every layer? A chip I worked on did this and unfortunately when we fixed a bug on a *different* metal layer we didn't want to remake the masks with the text. Thus "B1" chips were mislabeled as B0!
M8 => eight metal layer chip. Higher metal layers are coarser to carry more power and reduce manufacturing costs. You can also see M7 and M6 marked
Copper bond wires were eaten by nitric acid leading little dimples where they used to be attached to the bond pads
Several unused power pads. Possibly breaks out internal core voltage for debug / test
Time lapse etching chip layers
This area wasn't 100% etched, leading to vibrant blue/purple from SiO2 thin film interference
1) 20x air vs 2) 60x oil objective: 60x has higher resolution but lower depth of field, making the image appear different. Ex: although the lower left splotch is large, it's only visible in the 60x image. I might take SEM images later for better resolution
Transistors arranged into standard cells form the majority of the digital logic. This includes both the CPU and the digital portion of most peripherals
A few different I/O showing logic, ESD protection, etc between the top metal and transistor layer. A number of different I/O IP blocks are used. Would be interesting to match them up to the datasheet for analog functionality like ADC, USB, etc
Memory, probably the boot ROM
SRAM is scattered throughout the die. By analyzing the memory sizes and comparing to the datasheet it might be possible to guess what some of these are for
CMP fill is added to unused areas to keep polishing more even when preparing for the next layer. As such, it looks like it was omitted on M8 (top metal) but is found on other layers
That's all for now. Hope you enjoyed and let me know if you want more information on something!

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